1. Field of the Invention
The present invention relates to memristors, and more particularly, to a method of implementing memristor-based multilevel memories using a reference resistor array, a memristor array, a write-in circuit and a read-out/restoration circuit.
2. Background of the Related Art
In anticipating the end of Moore's law a decade from now, many new approaches to extend the end of this law have been proposed by the memory industry. One approach is to develop the Multi-Level Cell (MLC) technology which stores multiple bits in a multilevel form of information [1], [2] in a memory element. Commercially available MLC NAND memories can store four states per cell in the current technology. Most approaches are the transistor-based PRAM (Phase Change RAM) [3], [4], and [5], except HP's resistance-based RRAM [6], [7]. Recently, Stanley Williams et al. from HP had developed a remarkable memory element, called the memristor, which is based on the pinched hysteresis loop exhibited by Titanium Dioxide thin films [8], when sandwiched between Platinum electrodes.
There are several advantages of the memristor memory over conventional transistor-based memories. One is its strikingly small size. Though memristor is still at its early development stage, its size is at most one tenths of its RAM counterparts [11]. If the fabrication technology for memristor is improved more, the size advantage could be even more significant. Another feature of the memristor is its incomparable potential to store analog information, which enables the memristor to keep multiple bits of information in a memory cell [9], [10]. Besides these features, the memristor is also an ideal device for implementing synaptic weights in artificial neural networks [12], [13].
Despite many favorable features, memristors have several weaknesses in practice. One weakness comes from the nonlinearity in the φ vs. q curve, which makes it difficult to determine the proper pulse width for achieving a desired resistance value. If the nonlinearity is spatially a variant in the die of a chip, which is common in the fabrication process, the difficulty could be very serious. Another difficulty comes from the property of the memristor which integrates any kind of signals, including noise, which appeared at the memristor and results in the memristors being perturbed from its original pre-set values.
[References]
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